mirror of
https://git.datalinker.icu/vllm-project/vllm.git
synced 2025-12-09 04:24:58 +08:00
pre-commit autoupdate (#17380)
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
This commit is contained in:
parent
00ee37efa2
commit
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@ -12,29 +12,29 @@ repos:
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- id: yapf
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args: [--in-place, --verbose]
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- repo: https://github.com/astral-sh/ruff-pre-commit
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rev: v0.9.3
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rev: v0.11.7
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hooks:
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- id: ruff
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args: [--output-format, github, --fix]
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- repo: https://github.com/codespell-project/codespell
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rev: v2.4.0
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rev: v2.4.1
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hooks:
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- id: codespell
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additional_dependencies: ['tomli']
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args: ['--toml', 'pyproject.toml']
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- repo: https://github.com/PyCQA/isort
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rev: 0a0b7a830386ba6a31c2ec8316849ae4d1b8240d # 6.0.0
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rev: 6.0.1
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hooks:
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- id: isort
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- repo: https://github.com/pre-commit/mirrors-clang-format
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rev: v19.1.7
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rev: v20.1.3
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hooks:
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- id: clang-format
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exclude: 'csrc/(moe/topk_softmax_kernels.cu|quantization/gguf/(ggml-common.h|dequantize.cuh|vecdotq.cuh|mmq.cuh|mmvq.cuh))|vllm/third_party/.*'
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types_or: [c++, cuda]
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args: [--style=file, --verbose]
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- repo: https://github.com/jackdewinter/pymarkdown
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rev: v0.9.27
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rev: v0.9.29
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hooks:
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- id: pymarkdown
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args: [fix]
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@ -43,7 +43,7 @@ repos:
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hooks:
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- id: actionlint
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- repo: https://github.com/astral-sh/uv-pre-commit
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rev: 0.6.2
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rev: 0.6.17
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hooks:
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- id: pip-compile
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args: [requirements/test.in, -o, requirements/test.txt]
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@ -138,8 +138,8 @@ __device__ inline FragB dequant<vllm::kU4B8.id()>(int q) {
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const int HI = 0x00f000f0;
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const int EX = 0x64006400;
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// Guarantee that the `(a & b) | c` operations are LOP3s.
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int lo = lop3 < (0xf0 & 0xcc) | 0xaa > (q, LO, EX);
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int hi = lop3 < (0xf0 & 0xcc) | 0xaa > (q, HI, EX);
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int lo = lop3<(0xf0 & 0xcc) | 0xaa>(q, LO, EX);
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int hi = lop3<(0xf0 & 0xcc) | 0xaa>(q, HI, EX);
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// We want signed int4 outputs, hence we fuse the `-8` symmetric zero point
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// directly into `SUB` and `ADD`.
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const int SUB = 0x64086408;
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@ -182,8 +182,8 @@ __device__ inline FragB dequant<vllm::kU4.id()>(int q) {
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const int HI = 0x00f000f0;
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const int EX = 0x64006400;
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// Guarantee that the `(a & b) | c` operations are LOP3s.
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int lo = lop3 < (0xf0 & 0xcc) | 0xaa > (q, LO, EX);
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int hi = lop3 < (0xf0 & 0xcc) | 0xaa > (q, HI, EX);
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int lo = lop3<(0xf0 & 0xcc) | 0xaa>(q, LO, EX);
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int hi = lop3<(0xf0 & 0xcc) | 0xaa>(q, HI, EX);
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const int SUB = 0x64006400;
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const int MUL = 0x2c002c00;
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@ -209,8 +209,8 @@ __device__ inline typename ScalarType<half>::FragB dequant<half, 4>(
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const int HI = 0x00f000f0;
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const int EX = 0x64006400;
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// Guarantee that the `(a & b) | c` operations are LOP3s.
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int lo = lop3 < (0xf0 & 0xcc) | 0xaa > (q, LO, EX);
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int hi = lop3 < (0xf0 & 0xcc) | 0xaa > (q, HI, EX);
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int lo = lop3<(0xf0 & 0xcc) | 0xaa>(q, LO, EX);
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int hi = lop3<(0xf0 & 0xcc) | 0xaa>(q, HI, EX);
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// We want signed int4 outputs, hence we fuse the `-8` symmetric zero point
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// directly into `SUB` and `ADD`.
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const int SUB = 0x64086408;
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@ -233,9 +233,9 @@ dequant<nv_bfloat16, 4>(int q,
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// Guarantee that the `(a & b) | c` operations are LOP3s.
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int lo = lop3 < (0xf0 & 0xcc) | 0xaa > (q, MASK, EX);
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int lo = lop3<(0xf0 & 0xcc) | 0xaa>(q, MASK, EX);
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q >>= 4;
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int hi = lop3 < (0xf0 & 0xcc) | 0xaa > (q, MASK, EX);
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int hi = lop3<(0xf0 & 0xcc) | 0xaa>(q, MASK, EX);
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static constexpr uint32_t MUL = 0x3F803F80;
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static constexpr uint32_t ADD = 0xC308C308;
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@ -108,11 +108,11 @@ __device__ inline void dequant<half2, 4>(int q, half2* res) {
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const int MUL = 0x2c002c00;
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const int ADD = 0xd400d400;
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int lo0 = lop3 < (0xf0 & 0xcc) | 0xaa > (q, LO, EX);
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int hi0 = lop3 < (0xf0 & 0xcc) | 0xaa > (q, HI, EX);
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int lo0 = lop3<(0xf0 & 0xcc) | 0xaa>(q, LO, EX);
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int hi0 = lop3<(0xf0 & 0xcc) | 0xaa>(q, HI, EX);
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q >>= 8;
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int lo1 = lop3 < (0xf0 & 0xcc) | 0xaa > (q, LO, EX);
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int hi1 = lop3 < (0xf0 & 0xcc) | 0xaa > (q, HI, EX);
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int lo1 = lop3<(0xf0 & 0xcc) | 0xaa>(q, LO, EX);
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int hi1 = lop3<(0xf0 & 0xcc) | 0xaa>(q, HI, EX);
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res[0] = __hsub2(*reinterpret_cast<half2*>(&lo0),
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*reinterpret_cast<const half2*>(&SUB));
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@ -149,13 +149,13 @@ __device__ inline void dequant<nv_bfloat162, 4>(int q, nv_bfloat162* res) {
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static constexpr uint32_t MASK = 0x000f000f;
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static constexpr uint32_t EX = 0x43004300;
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int lo0 = lop3 < (0xf0 & 0xcc) | 0xaa > (q, MASK, EX);
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int lo0 = lop3<(0xf0 & 0xcc) | 0xaa>(q, MASK, EX);
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q >>= 4;
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int hi0 = lop3 < (0xf0 & 0xcc) | 0xaa > (q, MASK, EX);
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int hi0 = lop3<(0xf0 & 0xcc) | 0xaa>(q, MASK, EX);
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q >>= 4;
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int lo1 = lop3 < (0xf0 & 0xcc) | 0xaa > (q, MASK, EX);
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int lo1 = lop3<(0xf0 & 0xcc) | 0xaa>(q, MASK, EX);
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q >>= 4;
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int hi1 = lop3 < (0xf0 & 0xcc) | 0xaa > (q, MASK, EX);
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int hi1 = lop3<(0xf0 & 0xcc) | 0xaa>(q, MASK, EX);
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static constexpr uint32_t MUL = 0x3F803F80;
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static constexpr uint32_t ADD = 0xC300C300;
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@ -347,7 +347,7 @@ struct ComputeTile_W8A16_PerC_MtilexNtilex32_multistage_SM8x_SplitK {
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for (int n_idx = 0; n_idx < WARP_NITER; ++n_idx) {
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hmma16816_f32<FType>(
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C_frag[m_idx][n_idx], A_frag[reg_buf_idx][m_idx],
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reinterpret_cast<uint32_t(&)[2]>(BF_frag[reg_buf_idx][n_idx]));
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reinterpret_cast<uint32_t (&)[2]>(BF_frag[reg_buf_idx][n_idx]));
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}
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}
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}
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@ -173,8 +173,8 @@ dequant<half, vllm::kU4B8.id()>(int q) {
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const int HI = 0x00f000f0;
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const int EX = 0x64006400;
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// Guarantee that the `(a & b) | c` operations are LOP3s.
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int lo = lop3 < (0xf0 & 0xcc) | 0xaa > (q, LO, EX);
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int hi = lop3 < (0xf0 & 0xcc) | 0xaa > (q, HI, EX);
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int lo = lop3<(0xf0 & 0xcc) | 0xaa>(q, LO, EX);
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int hi = lop3<(0xf0 & 0xcc) | 0xaa>(q, HI, EX);
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// We want signed int4 outputs, hence we fuse the `-8` symmetric zero point
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// directly into `SUB` and `ADD`.
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const int SUB = 0x64086408;
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@ -197,9 +197,9 @@ dequant<nv_bfloat16, vllm::kU4B8.id()>(int q) {
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// Guarantee that the `(a & b) | c` operations are LOP3s.
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int lo = lop3 < (0xf0 & 0xcc) | 0xaa > (q, MASK, EX);
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int lo = lop3<(0xf0 & 0xcc) | 0xaa>(q, MASK, EX);
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q >>= 4;
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int hi = lop3 < (0xf0 & 0xcc) | 0xaa > (q, MASK, EX);
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int hi = lop3<(0xf0 & 0xcc) | 0xaa>(q, MASK, EX);
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typename ScalarType<nv_bfloat16>::FragB frag_b;
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static constexpr uint32_t MUL = 0x3F803F80;
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@ -221,8 +221,8 @@ dequant<half, vllm::kU4.id()>(int q) {
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const int HI = 0x00f000f0;
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const int EX = 0x64006400;
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// Guarantee that the `(a & b) | c` operations are LOP3s.
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int lo = lop3 < (0xf0 & 0xcc) | 0xaa > (q, LO, EX);
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int hi = lop3 < (0xf0 & 0xcc) | 0xaa > (q, HI, EX);
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int lo = lop3<(0xf0 & 0xcc) | 0xaa>(q, LO, EX);
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int hi = lop3<(0xf0 & 0xcc) | 0xaa>(q, HI, EX);
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const int SUB = 0x64006400;
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const int MUL = 0x2c002c00;
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@ -244,9 +244,9 @@ dequant<nv_bfloat16, vllm::kU4.id()>(int q) {
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// Guarantee that the `(a & b) | c` operations are LOP3s.
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int lo = lop3 < (0xf0 & 0xcc) | 0xaa > (q, MASK, EX);
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int lo = lop3<(0xf0 & 0xcc) | 0xaa>(q, MASK, EX);
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q >>= 4;
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int hi = lop3 < (0xf0 & 0xcc) | 0xaa > (q, MASK, EX);
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int hi = lop3<(0xf0 & 0xcc) | 0xaa>(q, MASK, EX);
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typename ScalarType<nv_bfloat16>::FragB frag_b;
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static constexpr uint32_t MUL = 0x3F803F80;
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@ -96,8 +96,8 @@ __device__ inline FragB dequant(int q) {
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const int HI = 0x00f000f0;
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const int EX = 0x64006400;
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// Guarantee that the `(a & b) | c` operations are LOP3s.
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int lo = lop3 < (0xf0 & 0xcc) | 0xaa > (q, LO, EX);
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int hi = lop3 < (0xf0 & 0xcc) | 0xaa > (q, HI, EX);
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int lo = lop3<(0xf0 & 0xcc) | 0xaa>(q, LO, EX);
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int hi = lop3<(0xf0 & 0xcc) | 0xaa>(q, HI, EX);
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// We want signed int4 outputs, hence we fuse the `-8` symmetric zero point
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// directly into `SUB` and `ADD`.
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const int SUB = 0x64086408;
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@ -141,8 +141,8 @@ __device__ inline FragB dequant_per_group(int q, FragS_GROUP& frag_s, int i) {
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static constexpr uint32_t HI = 0x00f000f0;
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static constexpr uint32_t EX = 0x64006400;
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// Guarantee that the `(a & b) | c` operations are LOP3s.
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uint32_t t0 = lop3 < (0xf0 & 0xcc) | 0xaa > (q, LO, EX);
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uint32_t t1 = lop3 < (0xf0 & 0xcc) | 0xaa > (q, HI, EX);
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uint32_t t0 = lop3<(0xf0 & 0xcc) | 0xaa>(q, LO, EX);
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uint32_t t1 = lop3<(0xf0 & 0xcc) | 0xaa>(q, HI, EX);
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// We want signed int4 outputs, hence we fuse the `-8` symmetric zero point
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// directly into `SUB` and `ADD`.
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static constexpr uint32_t SUB = 0x64086408;
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@ -127,8 +127,8 @@ __device__ inline FragB dequant_4bit(int q) {
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const int HI = 0x00f000f0;
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const int EX = 0x64006400;
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// Guarantee that the `(a & b) | c` operations are LOP3s.
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int lo = lop3 < (0xf0 & 0xcc) | 0xaa > (q, LO, EX);
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int hi = lop3 < (0xf0 & 0xcc) | 0xaa > (q, HI, EX);
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int lo = lop3<(0xf0 & 0xcc) | 0xaa>(q, LO, EX);
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int hi = lop3<(0xf0 & 0xcc) | 0xaa>(q, HI, EX);
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// We want signed int4 outputs, hence we fuse the `-8` symmetric zero point
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// directly into `SUB` and `ADD`.
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const int SUB = 0x64086408;
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