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[CPU][Bugfix] Fix Apple Silicon M1 compilation failure (#28681)
Signed-off-by: mgoin <mgoin64@gmail.com>
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@ -5,6 +5,10 @@
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#include <type_traits>
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#include <cstddef>
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#if defined(__APPLE__)
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#include <sys/sysctl.h>
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#endif
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#include "cpu_types.hpp"
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#include "scratchpad_manager.h"
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#include "cpu_attn_macros.h"
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@ -741,9 +745,21 @@ class AttentionScheduler {
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static int64_t get_available_l2_size() {
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static int64_t size = []() {
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#if defined(__APPLE__)
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// macOS doesn't have _SC_LEVEL2_CACHE_SIZE. Use sysctlbyname.
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int64_t l2_cache_size = 0;
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size_t len = sizeof(l2_cache_size);
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if (sysctlbyname("hw.l2cachesize", &l2_cache_size, &len, NULL, 0) == 0 &&
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l2_cache_size > 0) {
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return l2_cache_size >> 1; // use 50% of L2 cache
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}
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// Fallback if sysctlbyname fails
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return 128 * 1024 >> 1; // use 50% of 128KB
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#else
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long l2_cache_size = sysconf(_SC_LEVEL2_CACHE_SIZE);
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TORCH_CHECK_NE(l2_cache_size, -1);
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return l2_cache_size >> 1; // use 50% of L2 cache
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#endif
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}();
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return size;
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}
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@ -816,10 +832,14 @@ struct VecTypeTrait<float> {
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using vec_t = vec_op::FP32Vec16;
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};
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// ARM only supports BF16 with ARMv8.6-A extension
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#if (defined(__aarch64__) && !defined(ARM_BF16_SUPPORT))
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#else
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template <>
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struct VecTypeTrait<c10::BFloat16> {
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using vec_t = vec_op::BF16Vec16;
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};
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#endif
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#if !defined(__powerpc__)
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template <>
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@ -1588,9 +1608,17 @@ class AttentionMainLoop {
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if (use_sink) {
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alignas(64) float s_aux_fp32[16];
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#if defined(__aarch64__) && !defined(ARM_BF16_SUPPORT)
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// ARM without native BF16 support: manual conversion
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for (int i = 0; i < 16; ++i) {
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s_aux_fp32[i] = static_cast<float>(curr_s_aux[i]);
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}
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#else
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// All other platforms have BF16Vec16 available
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vec_op::BF16Vec16 vec_bf16(curr_s_aux);
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vec_op::FP32Vec16 vec_fp32(vec_bf16);
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vec_fp32.save(s_aux_fp32);
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#endif
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float* __restrict__ curr_sum_buffer = sum_buffer;
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float* __restrict__ curr_max_buffer = max_buffer;
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