xinyun/vllm
1
0
Fork 0
mirror of https://git.datalinker.icu/vllm-project/vllm.git synced 2026-04-07 23:37:06 +08:00
Code Issues Packages Projects Releases Wiki Activity

[Bugfix][CPU] Fix CPU backend ROPE dispatch for VL models (#30829)

Browse Source 
Signed-off-by: jiang1.li <jiang1.li@intel.com>
Signed-off-by: Li, Jiang <bigpyj64@gmail.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
(cherry picked from commit 0cd5353644d3d045ab33c7e8e19c182bfd7db911)
This commit is contained in:
Li, Jiang 2025-12-17 15:25:12 +08:00 committed by Kevin H. Luu
parent 761b730dcb
commit d78e128b8b
1 changed files with 9 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
vllm/model_executor/layers/rotary_embedding/common.py
View File

@ -264,6 +264,15 @@ class ApplyRotaryEmb(CustomOp):
return output
def forward_cpu(
self,
x: torch.Tensor,
cos: torch.Tensor,
sin: torch.Tensor,
) -> torch.Tensor:
# TODO (bigPYJ1151): need to enable fused CPU ROPE here
return self.forward_native(x, cos, sin)
def extra_repr(self) -> str:
s = f"is_neox_style={self.is_neox_style}"
s += f"enable_fp32_compute={self.enable_fp32_compute}"