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4 Commits

Author SHA1 Message Date
TJian
82b05b15e6
[BugFix] [FEAT] Enable fastsafetensors for ROCm platform (#28225) 
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
 2025-11-20 16:34:11 +00:00
Zhewen Li
0291fbf65c
[CI/Build] Fix amd model executor test (#27612) 
Signed-off-by: zhewenli <zhewenli@meta.com>
 2025-10-28 08:58:11 +00:00
Harry Mellor
d6953beb91
Convert formatting to use ruff instead of yapf + isort (#26247) 
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
 2025-10-05 07:06:22 -07:00
Cyrus Leung
d346ec695e
[CI/Build] Consolidate model loader tests and requirements (#25765) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-09-26 21:45:20 -07:00