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65 Commits

Author SHA1 Message Date
Shanshan Shen
87b4d1557d
[CustomOp][MM] Extract MMEncoderAttention as CustomOp and replace the backend of QwenVisionAttention with it. (#30125) 
Signed-off-by: shen-shanshan <467638484@qq.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: tjtanaa <tunjian.tan@embeddedllm.com>
 2025-12-15 11:13:32 +08:00
Harry Mellor
cf3eacfe58
Standardise get_rope to use rope_parameters["partial_rotary_factor"], not rotary_dim (#30389) 
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
 2025-12-11 20:45:23 +00:00
gh-wf
36c9ce2554
Ensure minimum frames for GLM 4.6V compatibility (#30285) 
Signed-off-by: Wayne Ferguson <wayneferguson@gmail.com>
 2025-12-11 05:26:49 +00:00
Dazhi Jiang
bcb6f5947f
[Perf] Remove sync point in vit torch sdpa attn backend (#30232) 
Signed-off-by: Dazhi Jiang <dazhi_jiang@163.com>
 2025-12-08 07:12:42 +00:00
Cyrus Leung
671427efbf
[Model] Move multimodal_cpu_fields definition to field config (#30181) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-12-06 13:40:02 +00:00
Cyrus Leung
c46b932df2
[Chore] Deprecate SupportsMultiModal.merge_by_field_config (#30170) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-12-06 07:57:28 +00:00
Cyrus Leung
fe3398fab2
[Chore] Enable passing tokenizer=None into MM processor (#29724) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-11-29 06:25:10 -08:00
Mingyuan Ma
460d8bbf2d
Remove upstream fa checks (#29471) 
Signed-off-by: mingyuanm <mingyuanm@nvidia.com>
Signed-off-by: Roger Wang <hey@rogerw.io>
Co-authored-by: Roger Wang <hey@rogerw.io>
 2025-11-28 05:52:42 -08:00
Roger Wang
0ff70821c9
[Core] Deprecate xformers (#29262) 
Signed-off-by: Roger Wang <hey@rogerw.io>
 2025-11-24 04:18:55 +00:00
Yuxuan Zhang
0c80efd94f
GLM-V video segmentation solution adjustment (#28941) 
Signed-off-by: zRzRzRzRzRzRzR <2448370773@qq.com>
 2025-11-19 17:32:55 +00:00
Harry Mellor
a8b70304d6
Update rope_scaling to rope_parameters in preparation for Transformers v5 (#28542) 
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
 2025-11-19 09:06:36 -08:00
Lukas Geiger
3d4e7d34be
[Model][QwenVL] Simplify cos/sin rotary embedding indexing (#28962) 
Signed-off-by: Lukas Geiger <lukas.geiger94@gmail.com>
 2025-11-19 05:43:01 +00:00
Isotr0py
e4bb2684bc
[Models] Replace all nn.Conv2d with vLLM's Conv2dLayer (#28842) 
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-11-18 18:56:04 +00:00
Canlin Guo
b9489f51e1
[Model][Perf] Use cos and sin cache in QwenVL (#28798) 
Signed-off-by: gcanlin <canlinguosdu@gmail.com>
 2025-11-18 11:51:54 +00:00
Shanshan Shen
41b92f7d38
[Model][MM] Extract conv layer as CustomOp (#28455) 
Signed-off-by: shen-shanshan <467638484@qq.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-11-14 19:16:13 +08:00
Harry Mellor
97d1c99302
Rename clashing method names for vLLM model protocol (#27583) 
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
 2025-11-12 19:14:33 -08:00
Cyrus Leung
afffd3cc8a
[Model] Pass mm_features directly into get_mrope_input_positions (#28399) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-11-11 21:14:48 +08:00
Matthew Bonanni
b30dfa03c5
[Attention] Refactor CUDA attention backend selection logic (#24794) 
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
Signed-off-by: Matthew Bonanni <mbonanni001@gmail.com>
Co-authored-by: Luka Govedič <ProExpertProg@users.noreply.github.com>
 2025-11-11 07:40:44 -05:00
Cyrus Leung
d0e186c16f
[V0 Deprecation] Remove unused context_len and seq_len from M-RoPE (#28395) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-11-11 00:30:06 +08:00
vllmellm
b13a447546
[Bugfix][ROCm] Fix ViT rotary embeddings for torch.compile compatibility on ROCm (#27748) 
Signed-off-by: vllmellm <vllm.ellm@embeddedllm.com>
 2025-11-03 17:12:19 -08:00
Isotr0py
7e06c40e63
[Bugfix] Fix broken MRoPE for GLM-4.1V/GLM-4.5V (#27860) 
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-10-31 17:04:51 +00:00
Isotr0py
42efe609ba
[MM][Bugfix] Replace PatchEmbed's conv3d to linear layer (#27418) 
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Roger Wang <hey@rogerw.io>
 2025-10-24 07:32:47 +00:00
Cyrus Leung
fe2016de2d
[CI/Build] Remove unnecessary flags from test registry (#27353) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-10-23 14:42:40 +00:00
Bradley D
570c3e1cd4
[Bugfix] Honor --mm_encoder_attn_backend when used (#27124) 
Co-authored-by: Bradley D <4551889+bradleyhd@users.noreply.github.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
 2025-10-23 20:09:52 +08:00
Roger Wang
c3a2c6ac5f
[MM][Core] Decouple ViT backend from LM backend (#27061) 
Signed-off-by: Roger Wang <hey@rogerw.io>
 2025-10-21 00:30:10 -07:00
Cyrus Leung
d2f816d6ff
[Bugfix] Standardize merging multimodal embeddings (#26771) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-10-14 09:36:21 +00:00
Harry Mellor
8fcaaf6a16
Update Optional[x] -> x | None and Union[x, y] to x | y (#26633) 
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
 2025-10-12 09:51:31 -07:00
Harry Mellor
d6953beb91
Convert formatting to use ruff instead of yapf + isort (#26247) 
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
 2025-10-05 07:06:22 -07:00
Cyrus Leung
44ea85137a
[Model] Support nested structures for TensorSchema (#26212) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-10-04 01:20:32 -07:00
Wenlong Wang
79aa244678
[Multi Modal] Configurable MM Profiling (#25631) 
Signed-off-by: wwl2755 <wangwenlong2755@gmail.com>
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
Co-authored-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
 2025-10-03 03:59:10 -07:00
Cyrus Leung
39b643dc1a
[Model] Use merge_by_field_config for MM models (G) (#26117) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-10-02 22:38:29 -07:00
TJian
9c5ee91b2a
[ROCm] [VL] [Bugfix] Fix vit flash attn dispatcher logic for ROCm (#26104) 
Signed-off-by: tjtanaa <tunjian.tan@embeddedllm.com>
 2025-10-02 22:34:53 -07:00
Matthew Bonanni
2aaa423842
[Attention] Move Backend enum into registry (#25893) 
Signed-off-by: Matthew Bonanni <mbonanni@redhat.com>
 2025-10-02 20:32:24 -07:00
Isotr0py
bd51f78e39
[V0 Deprecation][Models] Remove all V0 condition for mm embeddings merge (#25331) 
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Signed-off-by: isotr0py <2037008807@qq.com>
 2025-09-29 14:09:18 +08:00
Cyrus Leung
27d7638b94
[Bugfix] Merge MM embeddings by index instead of token IDs (#16229) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
Signed-off-by: NickLucche <nlucches@redhat.com>
Signed-off-by: Roger Wang <hey@rogerw.io>
Co-authored-by: NickLucche <nlucches@redhat.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
 2025-09-27 08:15:12 +00:00
Cyrus Leung
babad6e5dd
[Misc] Move DP for ViT code inside model executor dir (#25459) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-09-23 09:20:52 +00:00
Woosuk Kwon
1c3ffdbecc
[V0 Deprecation] Remove V0 sampling metadata (#25345) 
Signed-off-by: Woosuk Kwon <woosuk@thinkingmachines.ai>
 2025-09-21 10:37:11 -07:00
Wenlong Wang
035fd2bd2c
[Multi Modal][Performance] Fused Q,K's apply_rope in more models (#25005) 
Signed-off-by: wwl2755 <wangwenlong2755@gmail.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
 2025-09-21 03:55:10 +00:00
Isotr0py
0e219cd50b
[Bugfix] Fix GLM4.1V multimodal processor with compatability for Transformers v4.56 (#24822) 
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-09-15 20:45:06 +08:00
Didier Durand
4979eb79da
[Doc]: fix typos in various files (#24821) 
Signed-off-by: Didier Durand <durand.didier@gmail.com>
 2025-09-15 01:08:52 -07:00
Samit
f17c075884
[Model] Switch to Fused RMSNorm in GLM-4.1V model (#24733) 
Signed-off-by: SamitHuang <285365963@qq.com>
 2025-09-12 09:12:23 -07:00
Lukas Geiger
57f94e88ea
[Models] Optimise and simplify _validate_and_reshape_mm_tensor (#24742) 
Signed-off-by: Lukas Geiger <lukas.geiger94@gmail.com>
 2025-09-12 15:37:37 +00:00
Hyogeun Oh (오효근)
41f17bf290
[Docs] Fix warnings in mkdocs build (continued) (#24740) 
Signed-off-by: Zerohertz <ohg3417@gmail.com>
 2025-09-12 06:43:15 -07:00
Wenlong Wang
72fc8aa412
[Multi Modal] Add FA3 in VIT (#24347) 
Signed-off-by: wwl2755 <wangwenlong2755@gmail.com>
 2025-09-12 21:27:24 +08:00
Isotr0py
bcbe2a4d9e
[VLM] Optimize GLM4.5-V-style video processing to only decode necessary frames (#24161) 
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-09-11 09:44:34 -07:00
Chenxi Yang
d13360183a
Remove redundant all gather + split (#23441) 
Co-authored-by: Chenxi Yang <cxyang@meta.com>
Co-authored-by: Lu Fang <30275821+houseroad@users.noreply.github.com>
 2025-09-10 23:45:07 -07:00
Chatcharin Sangbutsarakum
8a46602606
[Model] Remove unnecessary CUDA sync of GLM-4.1V image and video preprocess (#24332) 
Signed-off-by: Win <chatcharinsang@gmail.com>
Co-authored-by: Roger Wang <hey@rogerw.io>
 2025-09-07 23:10:54 -07:00
Isotr0py
53b19ccdd5
[Core] Allow disabling TP sharding for parallel Linear layer (#23024) 
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Signed-off-by: Isotr0py <2037008807@qq.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
 2025-09-05 22:53:58 -07:00
WeiQing Chen
2f0bab3f26
[Model] Support dp on ViT on GLM-4.5V (#23168) 
Signed-off-by: David Chen <530634352@qq.com>
 2025-09-02 10:48:18 +00:00
bppps
424fb7a5d2
[BugFix] Fix the issue where image embeddings were incorrectly split.… (#23366) 
Signed-off-by: bppps <bpppsaka@gmail.com>
Co-authored-by: zouyu.zzx <zouyu.zzx@alibaba-inc.com>
Co-authored-by: bppps <bpppsaka@gmail.com>
 2025-08-22 16:56:46 +00:00