xinyun/vllm
1
0
Fork 0
mirror of https://git.datalinker.icu/vllm-project/vllm.git synced 2025-12-11 07:45:01 +08:00
Code Issues Packages Projects Releases Wiki Activity
10,111 Commits 155 Branches 89 Tags
Commit Graph

81 Commits

Author SHA1 Message Date
Cyrus Leung
f9a8084e48
[Model] Use merge_by_field_config for MM models (InternVL family) (#26153) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-10-03 01:59:06 -07:00
Roger Wang
7b57a433da
[Model] Support Dots OCR (#24645) 
Signed-off-by: Roger Wang <hey@rogerw.io>
Co-authored-by: yinz-aizip <yinz@aizip.ai>
 2025-09-22 02:24:40 +00:00
Roger Wang
0f7acdd73c
[Model] Support Qwen3-VL Model Series (#24727) 
Signed-off-by: Roger Wang <hey@rogerw.io>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Huang Jie <92386084+JJJYmmm@users.noreply.github.com>
Co-authored-by: 松灵 <26085463+wulipc@users.noreply.github.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-09-17 05:01:04 +00:00
Woosuk Kwon
759ef49b15
Remove V0 Encoder-Decoder Support (#24907) 
Signed-off-by: Woosuk Kwon <woosuk@thinkingmachines.ai>
 2025-09-15 21:17:14 -07:00
Isotr0py
0e219cd50b
[Bugfix] Fix GLM4.1V multimodal processor with compatability for Transformers v4.56 (#24822) 
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-09-15 20:45:06 +08:00
Chenheli Hua
7f2ea7074e
[Frontend][Multimodal] Allow skipping media data when UUIDs are provided. (#23950) 
Signed-off-by: Roger Wang <hey@rogerw.io>
Signed-off-by: Chenheli Hua <huachenheli@outlook.com>
Signed-off-by: Roger Wang <hey@rogerw.me>
Co-authored-by: Roger Wang <hey@rogerw.io>
Co-authored-by: Roger Wang <hey@rogerw.me>
 2025-09-13 02:16:06 +00:00
Kwai-Keye
7c8271cd1e
[Model]: support KeyeVL-1_5-8B (#23838) 
Signed-off-by: wangruitao <wangruitao@kuaishou.com>
Co-authored-by: wangruitao <wangruitao@kuaishou.com>
 2025-09-01 03:50:27 -07:00
CSWYF3634076
644d57d531
[Model] Add Ernie4.5 VL Model Support (#22514) 
Signed-off-by: wangyafeng <wangyafeng@baidu.com>
 2025-08-26 21:02:55 -07:00
Cyrus Leung
0c31e28e95
[Bugfix] Fix extra whitespace in strings caused by newline (#23272) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-08-20 22:03:00 -07:00
杨奇(yann qi)
655a09f653
[Model][VLM] Support R-4B Model (#23246) 
Signed-off-by: yannqi <yannqi@qq.com>
Signed-off-by: 杨奇(yann qi) <51905299+yannqi@users.noreply.github.com>
Signed-off-by: Cyrus Leung <cyrus.tl.leung@gmail.com>
Co-authored-by: yannqiyang <yannqiyang@tencent.com>
Co-authored-by: gemini-code-assist[bot] <176961590+gemini-code-assist[bot]@users.noreply.github.com>
Co-authored-by: Cyrus Leung <cyrus.tl.leung@gmail.com>
 2025-08-21 04:08:52 +00:00
myselvess
b87cb97a53
[Model] support new model ovis2.5 (#23084) 
Signed-off-by: myselvess <244285088@qq.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-08-19 13:12:59 +00:00
Isotr0py
31fd3265c8
[Bugfix] Fix broken Minimax-01-VL model (#22116) 
Signed-off-by: Isotr0py <2037008807@qq.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-08-19 08:49:29 +00:00
qizixi
4efd43e9b4
Fix GLM-4.5V-FP8 numerical issue (#22949) 
Signed-off-by: qizixi <qizixi@meta.com>
Co-authored-by: Cyrus Leung <tlleungac@connect.ust.hk>
 2025-08-19 07:56:31 +00:00
dongluw
9f909b8996
[New Model] Support Command-A-Vision (#22660) 
Signed-off-by: donglu <donglu@cohere.com>
 2025-08-12 01:39:54 -07:00
Nicolò Lucchesi
5a16fa614c
[Model] Gemma3n MM (#20495) 
Signed-off-by: ShriKode <shrikode@gmail.com>
Signed-off-by: NickLucche <nlucches@redhat.com>
Signed-off-by: Roger Wang <hey@rogerw.me>
Co-authored-by: ShriKode <shrikode@gmail.com>
Co-authored-by: Roger Wang <hey@rogerw.me>
 2025-08-09 09:56:25 -07:00
Cyrus Leung
139d155781
[Frontend] Use engine argument to control MM cache size (#22441) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-08-07 09:47:10 -07:00
Cyrus Leung
766bc8162c
[Core] Store only the keys for multi-modal data in P0 (#22198) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-08-07 01:45:04 -07:00
Jee Jee Li
a7b8788d2c
[Misc] Modify the organization of GLM series (#22171) 
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
 2025-08-03 23:51:20 -07:00
Roger Wang
27a145e893
[Doc] Add example for Step3-VL (#22061) 
Signed-off-by: Roger Wang <hey@rogerw.me>
 2025-08-01 08:35:49 +00:00
Cyrus Leung
82de9b9d46
[Misc] Automatically resolve HF processor init kwargs (#22005) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-07-31 22:44:10 -07:00
Isotr0py
3d847a3125
[VLM] Add video support for Intern-S1 (#21671) 
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-07-27 11:49:43 +00:00
Isotr0py
eed2f463b2
[VLM] Support HF format Phi-4-MM model (#17121) 
Signed-off-by: Isotr0py <2037008807@qq.com>
 2025-07-26 20:07:57 -07:00
Lyu Han
875af38e01
Support Intern-S1 (#21628) 
Signed-off-by: Roger Wang <hey@rogerw.me>
Signed-off-by: Isotr0py <2037008807@qq.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Your Name <you@example.com>
Co-authored-by: Roger Wang <hey@rogerw.me>
Co-authored-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-07-26 19:14:04 +08:00
bigshanedogg
29c6fbe58c
[MODEL] New model support for naver-hyperclovax/HyperCLOVAX-SEED-Vision-Instruct-3B (#20931) 
Signed-off-by: bigshanedogg <bigshane319@gmail.com>
 2025-07-25 06:05:42 -07:00
kYLe
4ef00b5cac
[VLM] Add Nemotron-Nano-VL-8B-V1 support (#20349) 
Signed-off-by: Kyle Huang <kylhuang@nvidia.com>
Co-authored-by: Cyrus Leung <cyrus.tl.leung@gmail.com>
 2025-07-17 03:07:55 -07:00
Cyrus Leung
9fb52e523a
[V1] Support any head size for FlexAttention backend (#20467) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-07-06 09:54:36 -07:00
汪志鹏
25950dca9b
Add ignore consolidated file in mistral example code (#20420) 
Signed-off-by: 汪志鹏 <wangzhipeng628@gmail.com>
 2025-07-04 02:55:07 +00:00
Kwai-Keye
8452946c06
[Model][VLM] Support Keye-VL-8B-Preview (#20126) 
Signed-off-by: Kwai-Keye <Keye@kuaishou.com>
 2025-07-01 23:35:04 -07:00
Yuxuan Zhang
ed70f3c64f
Add GLM4.1V model (Draft) (#19331) 
Signed-off-by: zRzRzRzRzRzRzR <2448370773@qq.com>
Signed-off-by: Isotr0py <mozf@mail2.sysu.edu.cn>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-07-01 12:48:26 +00:00
汪志鹏
c3bf9bad11
[New model support]Support Tarsier2 (#19887) 
Signed-off-by: 汪志鹏 <wangzhipeng628@gmail.com>
 2025-06-21 04:01:51 +00:00
Simon Mo
02f0c7b220
[Misc] Add SPDX-FileCopyrightText (#19100) 
Signed-off-by: simon-mo <simon.mo@hey.com>
 2025-06-03 11:20:17 -07:00
汪志鹏
1282bd812e
Add tarsier model support (#18985) 
Signed-off-by: 汪志鹏 <wangzhipeng628@gmail.com>
 2025-06-03 13:13:13 +08:00
Harry Mellor
27bebcd897
Convert examples to ruff-format (#18400) 
Signed-off-by: Harry Mellor <19981378+hmellor@users.noreply.github.com>
 2025-05-26 16:57:54 +00:00
Isotr0py
75f81750f3
[VLM] Initialize video input support for InternVL models (#18499) 
Signed-off-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Cyrus Leung <cyrus.tl.leung@gmail.com>
 2025-05-25 04:51:25 +00:00
Chenheli Hua
04eb88dc80
Re-submit: Fix: Proper RGBA -> RGB conversion for PIL images. (#18569) 
Signed-off-by: Chenheli Hua <huachenheli@outlook.com>
 2025-05-23 01:59:18 +00:00
Isotr0py
021c16c7ca
[Model] Broadcast Ovis2 implementation to fit Ovis1.6 (#17861) 
Signed-off-by: Isotr0py <2037008807@qq.com>
 2025-05-11 17:56:30 -07:00
Cyrus Leung
5b8c390747
[Bugfix] Fix modality limits in vision language example (#17721) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-05-06 16:12:28 +00:00
Cyrus Leung
d7543862bd
[Misc] Rename assets for testing (#17575) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-05-02 03:29:25 -07:00
Cyrus Leung
f89d0e11bf
[Misc] Continue refactoring model tests (#17573) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-05-01 22:06:08 -07:00
Isotr0py
88c8304104
[Model] Refactor Ovis2 to support original tokenizer (#17537) 
Signed-off-by: Isotr0py <2037008807@qq.com>
 2025-05-01 11:00:53 -07:00
Marco
54072f315f
[MODEL ADDITION] Ovis2 Model Addition (#15826) 
Signed-off-by: Marco <121761685+mlinmg@users.noreply.github.com>
Signed-off-by: Isotr0py <2037008807@qq.com>
Signed-off-by: isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <2037008807@qq.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-04-30 07:33:29 +00:00
Cyrus Leung
205d84aaa9
[VLM] Clean up models (#16873) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-04-19 12:13:06 +00:00
Isotr0py
83f3c3bd91
[Model] Refactor Phi-4-multimodal to use merged processor and support V1 (#15477) 
Signed-off-by: Isotr0py <2037008807@qq.com>
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
Co-authored-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-04-19 02:26:11 -07:00
Yang Fan
2c1bd848a6
[Model][VLM] Add Qwen2.5-Omni model support (thinker only) (#15130) 
Signed-off-by: fyabc <suyang.fy@alibaba-inc.com>
Signed-off-by: Roger Wang <ywang@roblox.com>
Co-authored-by: Roger Wang <136131678+ywang96@users.noreply.github.com>
Co-authored-by: Roger Wang <ywang@roblox.com>
Co-authored-by: Xiong Wang <wangxiongts@163.com>
 2025-04-18 23:14:36 -07:00
Cyrus Leung
aadb656562
[Misc] Clean up Kimi-VL (#16833) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-04-18 05:15:09 -07:00
Isotr0py
cb072ce93b
[Bugfix] Update Florence-2 tokenizer to make grounding tasks work (#16734) 
Signed-off-by: Isotr0py <2037008807@qq.com>
 2025-04-17 04:17:39 +00:00
Reid
6ae996a873
[Misc] refactor argument parsing in examples (#16635) 
Signed-off-by: reidliu41 <reid201711@gmail.com>
Co-authored-by: reidliu41 <reid201711@gmail.com>
 2025-04-15 08:05:30 +00:00
courage17340
b1308b84a3
[Model][VLM] Add Kimi-VL model support (#16387) 
Signed-off-by: courage17340 <courage17340@163.com>
 2025-04-14 21:41:48 +00:00
Jee Jee Li
3cdc57669f
[Misc] Delete redundant code (#16530) 
Signed-off-by: Jee Jee Li <pandaleefree@gmail.com>
Co-authored-by: Isotr0py <mozf@mail2.sysu.edu.cn>
 2025-04-12 11:21:37 +00:00
Cyrus Leung
d9fc8cd9da
[V1] Enable multi-input by default (#15799) 
Signed-off-by: DarkLight1337 <tlleungac@connect.ust.hk>
 2025-04-12 08:52:39 +00:00