Logo
Explore Help
Sign In
xinyun/vllm
1
0
Fork 0
You've already forked vllm
mirror of https://git.datalinker.icu/vllm-project/vllm.git synced 2025-12-10 06:55:01 +08:00
Code Issues Packages Projects Releases Wiki Activity
vllm/tests/models
History
Li, Jiang 6cc1e7d96d
[CPU] Update custom ops for the CPU backend (#20255)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
2025-07-01 07:25:03 +00:00
..
fixtures
[Mistral-Small 3.1] Update docs and tests (#14977)
2025-03-18 03:29:42 -07:00
language
[CPU] Update custom ops for the CPU backend (#20255)
2025-07-01 07:25:03 +00:00
multimodal
[CPU] Fix torch version in x86 CPU backend (#19258)
2025-06-26 03:34:47 -07:00
quantization
[CI] Disable failing GGUF model test (#19454)
2025-06-11 05:12:38 +00:00
__init__.py
[CI/Build] Move test_utils.py to tests/utils.py (#4425)
2024-05-13 23:50:09 +09:00
registry.py
[Model] support dots1 (#18254)
2025-06-29 19:34:36 -07:00
test_initialization.py
[CI Fix] Pin tests/models/registry.py MiniMaxText01ForCausalLM to revision due to model changes (#20199)
2025-06-28 13:43:06 +08:00
test_oot_registration.py
[CI Failure] Fix OOM with test_oot_registration_embedding (#20144)
2025-06-27 11:21:04 +08:00
test_registry.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
test_transformers.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
test_utils.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
test_vision.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
utils.py
[CI] Add mteb testing for rerank models (#19344)
2025-06-16 01:36:43 -07:00
Powered by Gitea Version: 1.23.1 Page: 511ms Template: 4ms
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API