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vllm
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vllm
/
tests
/
basic_correctness
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Roger Wang
8d5aa466fb
[V1][Core] Fix memory issue with logits & sampling (
#13776
)
...
Signed-off-by: Roger Wang <ywang@roblox.com>
2025-03-08 06:11:04 -08:00
..
__init__.py
[CI/Build] Move
test_utils.py
to
tests/utils.py
(
#4425
)
2024-05-13 23:50:09 +09:00
test_basic_correctness.py
[misc] Rename Ray ADAG to Compiled Graph (
#13928
)
2025-02-26 20:03:28 -08:00
test_chunked_prefill.py
[misc] Rename Ray ADAG to Compiled Graph (
#13928
)
2025-02-26 20:03:28 -08:00
test_cpu_offload.py
Consolidate Llama model usage in tests (
#13094
)
2025-02-13 22:18:03 -08:00
test_cumem.py
[V1][Core] Fix memory issue with logits & sampling (
#13776
)
2025-03-08 06:11:04 -08:00
test_preemption.py
[1/n][CI] Load models in CI from S3 instead of HF (
#13205
)
2025-02-19 07:34:59 +00:00
