Adrian Abeyta 2ff767b513

Enable scaled FP8 (e4m3fn) KV cache on ROCm (AMD GPU) (#3290) ...

Co-authored-by: Gregory Shtrasberg <Gregory.Shtrasberg@amd.com>
Co-authored-by: HaiShaw <hixiao@gmail.com>
Co-authored-by: AdrianAbeyta <Adrian.Abeyta@amd.com>
Co-authored-by: Matthew Wong <Matthew.Wong2@amd.com>
Co-authored-by: root <root@gt-pla-u18-08.pla.dcgpu>
Co-authored-by: mawong-amd <156021403+mawong-amd@users.noreply.github.com>
Co-authored-by: ttbachyinsda <ttbachyinsda@outlook.com>
Co-authored-by: guofangze <guofangze@kuaishou.com>
Co-authored-by: Michael Goin <mgoin64@gmail.com>
Co-authored-by: jacobthebanana <50071502+jacobthebanana@users.noreply.github.com>
Co-authored-by: Woosuk Kwon <woosuk.kwon@berkeley.edu>

2024-04-03 14:15:55 -07:00

..

cpu_extension.cmake

[Hardware][Intel] Add CPU inference backend (#3634)

2024-04-01 22:07:30 -07:00

hipify.py

[CI] Try introducing isort. (#3495)

2024-03-25 07:59:47 -07:00

utils.cmake

Enable scaled FP8 (e4m3fn) KV cache on ROCm (AMD GPU) (#3290)

2024-04-03 14:15:55 -07:00