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xinyun
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vllm
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vllm
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csrc
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rocm
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Shiyan Deng
5c1e496a75
[MISC] replace c10::optional with std::optional (
#25602
)
...
Signed-off-by: Shiyan Deng <dsy842974287@meta.com>
2025-09-24 16:56:21 -07:00
..
attention.cu
[Compile] Fix AMD Compile Error (
#25518
)
2025-09-24 00:42:48 +00:00
ops.h
[MISC] replace c10::optional with std::optional (
#25602
)
2025-09-24 16:56:21 -07:00
skinny_gemms.cu
[MISC] replace c10::optional with std::optional (
#25602
)
2025-09-24 16:56:21 -07:00
torch_bindings.cpp
[ROCm] Add skinny gemm bias support for dtypes fp16,bf16,fp8 (
#24988
)
2025-09-23 14:31:45 -04:00
