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vllm
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vllm
/
vllm
/
distributed
/
kv_transfer
/
kv_connector
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Flora Feng
53415653ff
[P/D][Nixl] Make kv cache register compatible with hybrid memory allocator (
#23079
)
...
Signed-off-by: sfeng33 <4florafeng@gmail.com>
2025-08-21 22:30:48 -07:00
..
v1
[P/D][Nixl] Make kv cache register compatible with hybrid memory allocator (
#23079
)
2025-08-21 22:30:48 -07:00
__init__.py
[Core] Implement disagg prefill by StatelessProcessGroup (
#10502
)
2024-12-01 19:01:00 -06:00
base.py
[V0 deprecation][P/D] Deprecate v0
KVConnectorBase
code (1/2) (
#21785
)
2025-08-04 19:11:33 -07:00
factory.py
[BugFix][Nixl][PD] Fix heterogenous TP (
#22663
)
2025-08-12 05:37:30 -07:00
utils.py
[BugFix][Nixl][PD] Fix heterogenous TP (
#22663
)
2025-08-12 05:37:30 -07:00