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vllm
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vllm
/
csrc
/
cpu
History
Li, Jiang
a2ae496589
[CPU] Support FP8 KV cache (
#14741
)
...
Signed-off-by: jiang1.li <jiang1.li@intel.com>
2025-03-14 22:07:36 -07:00
..
activation.cpp
…
attention.cpp
Adding cpu inference with VXE ISA for s390x architecture (
#12613
)
2025-03-06 08:40:53 -08:00
cache.cpp
[CPU] Support FP8 KV cache (
#14741
)
2025-03-14 22:07:36 -07:00
cpu_types_arm.hpp
[Bugfix] Explicitly include "omp.h" for MacOS to avoid installation failure (
#14051
)
2025-03-02 17:35:01 -08:00
cpu_types_vsx.hpp
…
cpu_types_vxe.hpp
Adding cpu inference with VXE ISA for s390x architecture (
#12613
)
2025-03-06 08:40:53 -08:00
cpu_types_x86.hpp
[CPU] Support FP8 KV cache (
#14741
)
2025-03-14 22:07:36 -07:00
cpu_types.hpp
Adding cpu inference with VXE ISA for s390x architecture (
#12613
)
2025-03-06 08:40:53 -08:00
dnnl_helper.hpp
…
layernorm.cpp
…
pos_encoding.cpp
[Bugfix][Kernel][CPU] Fix num_tokens in CPU rotary embedding kernel (
#14667
)
2025-03-13 23:47:49 -07:00
quant.cpp
Adding cpu inference with VXE ISA for s390x architecture (
#12613
)
2025-03-06 08:40:53 -08:00
torch_bindings.cpp
…
utils.cpp
…
