Aurick Qiao 2c19d96777
[Spec Decode] Integrate Suffix Decoding from Arctic Inference (#25784)
Co-authored-by: Aurick Qiao <aurick.qiao@snowflake.com>
2025-11-03 09:23:31 -08:00
..

Features

Compatibility Matrix

The tables below show mutually exclusive features and the support on some hardware.

The symbols used have the following meanings:

  • ✅ = Full compatibility
  • 🟠 = Partial compatibility
  • ❌ = No compatibility
  • ❔ = Unknown or TBD

!!! note Check the ❌ or 🟠 with links to see tracking issue for unsupported feature/hardware combination.

Feature x Feature

Feature CP APC LoRA SD CUDA graph pooling enc-dec logP prmpt logP async output multi-step mm best-of beam-search prompt-embeds
CP ✅
APC ✅ ✅
LoRA ✅ ✅ ✅
SD ✅ ✅ ❌ ✅
CUDA graph ✅ ✅ ✅ ✅ ✅
pooling 🟠* 🟠* ✅ ❌ ✅ ✅
enc-dec ❌ ❌ ❌ ❌ ✅ ✅ ✅
logP ✅ ✅ ✅ ✅ ✅ ❌ ✅ ✅
prmpt logP ✅ ✅ ✅ ✅ ✅ ❌ ✅ ✅ ✅
async output ✅ ✅ ✅ ❌ ✅ ❌ ❌ ✅ ✅ ✅
multi-step ❌ ✅ ❌ ❌ ✅ ❌ ❌ ✅ ✅ ✅ ✅
mm ✅ ✅ 🟠^ ❔ ✅ ✅ ✅ ✅ ✅ ✅ ❔ ✅
best-of ✅ ✅ ✅ ❌ ✅ ❌ ✅ ✅ ✅ ❔ ❌ ✅ ✅
beam-search ✅ ✅ ✅ ❌ ✅ ❌ ✅ ✅ ✅ ❔ ❌ ❔ ✅ ✅
prompt-embeds ✅ ✅ ✅ ❌ ✅ ❌ ❌ ✅ ❌ ❔ ❔ ❌ ❔ ❔ ✅

* Chunked prefill and prefix caching are only applicable to last-token pooling.
^ LoRA is only applicable to the language backbone of multimodal models.

Feature x Hardware

Feature Volta Turing Ampere Ada Hopper CPU AMD TPU Intel GPU
CP ❌ ✅ ✅ ✅ ✅ ✅ ✅ ✅ ✅
APC ❌ ✅ ✅ ✅ ✅ ✅ ✅ ✅ ✅
LoRA ✅ ✅ ✅ ✅ ✅ ✅ ✅ ✅ ✅
SD ✅ ✅ ✅ ✅ ✅ ❌ ✅ ❌ 🟠
CUDA graph ✅ ✅ ✅ ✅ ✅ ❌ ✅ ❌ ❌
pooling ✅ ✅ ✅ ✅ ✅ ✅ ✅ ❌ ✅
enc-dec ✅ ✅ ✅ ✅ ✅ ✅ ❌ ❌ ✅
mm ✅ ✅ ✅ ✅ ✅ ✅ ✅ ❌ 🟠
logP ✅ ✅ ✅ ✅ ✅ ✅ ✅ ❌ ✅
prmpt logP ✅ ✅ ✅ ✅ ✅ ✅ ✅ ❌ ✅
async output ✅ ✅ ✅ ✅ ✅ ❌ ❌ ❌ ✅
multi-step ✅ ✅ ✅ ✅ ✅ ❌ ✅ ❌ ✅
best-of ✅ ✅ ✅ ✅ ✅ ✅ ✅ ❌ ✅
beam-search ✅ ✅ ✅ ✅ ✅ ✅ ✅ ❌ ✅
prompt-embeds ✅ ✅ ✅ ✅ ✅ ✅ ❔ ❌ ✅