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mirror of https://git.datalinker.icu/vllm-project/vllm.git synced 2025-12-16 12:35:01 +08:00
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vllm/tests/models
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Li, Jiang 79f2f1c2a1
[CPU][CI] Fallback sliding window to v0 and fix CPU pooling model tests (#19901)
Signed-off-by: jiang1.li <jiang1.li@intel.com>
2025-06-20 15:30:36 +00:00
..
fixtures
[Mistral-Small 3.1] Update docs and tests (#14977)
2025-03-18 03:29:42 -07:00
language
[CPU][CI] Fallback sliding window to v0 and fix CPU pooling model tests (#19901)
2025-06-20 15:30:36 +00:00
multimodal
[Bugfix] Update multimodel models mapping to fit new checkpoint after Transformers v4.52 (#19151)
2025-06-17 15:58:38 +00:00
quantization
[CI] Disable failing GGUF model test (#19454)
2025-06-11 05:12:38 +00:00
__init__.py
[CI/Build] Move test_utils.py to tests/utils.py (#4425)
2024-05-13 23:50:09 +09:00
registry.py
[Model] GPT2ForSequenceClassification model (#19663)
2025-06-20 12:07:41 +00:00
test_initialization.py
[BugFix][V1] Fix memory profiling bug (#18974)
2025-06-07 10:34:51 -07:00
test_oot_registration.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
test_registry.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
test_transformers.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
test_utils.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
test_vision.py
[Misc] Add SPDX-FileCopyrightText (#19100)
2025-06-03 11:20:17 -07:00
utils.py
[CI] Add mteb testing for rerank models (#19344)
2025-06-16 01:36:43 -07:00
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