This website requires JavaScript.
Explore
Help
Sign In
xinyun
/
vllm
Watch
1
Star
0
Fork
0
You've already forked vllm
mirror of
https://git.datalinker.icu/vllm-project/vllm.git
synced
2025-12-24 14:15:01 +08:00
Code
Issues
Packages
Projects
Releases
Wiki
Activity
vllm
/
tests
/
models
/
language
/
generation
History
Li, Jiang
7721ef1786
[CI/Build][CPU] Fix CPU CI and remove all CPU V0 files (
#20560
)
...
Signed-off-by: jiang1.li <jiang1.li@intel.com>
2025-07-07 22:13:44 -07:00
..
__init__.py
[CI/Build] Reorganize models tests (
#17459
)
2025-04-30 23:03:08 -07:00
test_bart.py
[CI] change spell checker from codespell to typos (
#18711
)
2025-06-11 19:57:10 -07:00
test_common.py
[CI/Build][CPU] Fix CPU CI and remove all CPU V0 files (
#20560
)
2025-07-07 22:13:44 -07:00
test_gemma.py
[Fix] Fix gemma CI test failing on main (
#20124
)
2025-06-26 21:06:59 -07:00
test_granite.py
[Misc] Add SPDX-FileCopyrightText (
#19100
)
2025-06-03 11:20:17 -07:00
test_hybrid.py
Enable V1 for Hybrid SSM/Attention Models (
#20016
)
2025-07-04 17:46:53 +00:00
test_mistral.py
[Bugfix] Fix Mistral tool-parser regex for nested JSON (
#20093
)
2025-06-26 01:01:17 +00:00
test_phimoe.py
[Misc] Add SPDX-FileCopyrightText (
#19100
)
2025-06-03 11:20:17 -07:00