Chendi.Xue 12e21701e7
[DOC][FEATURES][CPU]update cpu feature for v1 (#27135)
Signed-off-by: Chendi Xue <chendi.xue@intel.com>
2025-10-18 01:10:45 -07:00
..

Features

Compatibility Matrix

The tables below show mutually exclusive features and the support on some hardware.

The symbols used have the following meanings:

  • = Full compatibility
  • 🟠 = Partial compatibility
  • = No compatibility
  • = Unknown or TBD

!!! note Check the or 🟠 with links to see tracking issue for unsupported feature/hardware combination.

Feature x Feature

Feature CP APC LoRA SD CUDA graph pooling enc-dec logP prmpt logP async output multi-step mm best-of beam-search prompt-embeds
CP
APC
LoRA
SD
CUDA graph
pooling 🟠* 🟠*
enc-dec
logP
prmpt logP
async output
multi-step
mm 🟠^
best-of
beam-search
prompt-embeds

* Chunked prefill and prefix caching are only applicable to last-token pooling.
^ LoRA is only applicable to the language backbone of multimodal models.

Feature x Hardware

Feature Volta Turing Ampere Ada Hopper CPU AMD TPU Intel GPU
CP
APC
LoRA
SD 🟠
CUDA graph
pooling
enc-dec
mm 🟠
logP
prmpt logP
async output
multi-step
best-of
beam-search
prompt-embeds ?