This website requires JavaScript.
Explore
Help
Sign In
xinyun
/
vllm
Watch
1
Star
0
Fork
0
You've already forked vllm
mirror of
https://git.datalinker.icu/vllm-project/vllm.git
synced
2026-01-28 01:25:56 +08:00
Code
Issues
Packages
Projects
Releases
Wiki
Activity
vllm
/
vllm
/
platforms
History
wenxindongwork
8f0d516715
[TPU] Support Pathways in vLLM (
#21417
)
...
Signed-off-by: wenxindongwork <wenxindong@google.com>
2025-07-30 10:02:12 -07:00
..
__init__.py
[TPU] Support Pathways in vLLM (
#21417
)
2025-07-30 10:02:12 -07:00
cpu.py
[CPU] Enable shared-memory based pipeline parallel for CPU backend (
#21289
)
2025-07-21 09:07:08 -07:00
cuda.py
[Attention] Make CutlassMLA the default backend for SM100 (blackwell) (
#21626
)
2025-07-27 20:13:00 +00:00
interface.py
Fix kv_cache_dtype handling for out-of-tree HPU plugin (
#21302
)
2025-07-21 23:35:14 -07:00
neuron.py
[Refactor]Abstract Platform Interface for Distributed Backend and Add xccl Support for Intel XPU (
#19410
)
2025-07-07 04:32:32 +00:00
rocm.py
Fix kv_cache_dtype handling for out-of-tree HPU plugin (
#21302
)
2025-07-21 23:35:14 -07:00
tpu.py
Fix kv_cache_dtype handling for out-of-tree HPU plugin (
#21302
)
2025-07-21 23:35:14 -07:00
xpu.py
[XPU] use
ZE_AFFINITY_MASK
for device select on xpu (
#21815
)
2025-07-30 03:56:14 +00:00