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mirror of https://git.datalinker.icu/vllm-project/vllm.git synced 2025-12-15 13:05:47 +08:00
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vllm/tests/v1/sample
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Fanli Lin 0700fdddc7 use FP1 instead
Signed-off-by: Fanli Lin <fanli.lin@intel.com>
2025-10-17 01:40:45 -07:00
..
__init__.py
[V1] Adding min tokens/repetition/presence/frequence penalties to V1 sampler (#10681)
2024-12-26 19:02:58 +09:00
test_logprobs_e2e.py
Convert formatting to use ruff instead of yapf + isort (#26247)
2025-10-05 07:06:22 -07:00
test_logprobs.py
[Bugfix] Fix SHM cache initialization (#26427)
2025-10-09 02:48:04 -07:00
test_rejection_sampler.py
Update Optional[x] -> x | None and Union[x, y] to x | y (#26633)
2025-10-12 09:51:31 -07:00
test_sampler.py
[V1] Logit processors for rejection sampler (#19482)
2025-10-07 13:02:49 -07:00
test_sampling_params_e2e.py
use FP1 instead
2025-10-17 01:40:45 -07:00
test_topk_topp_sampler.py
[Kernel] Lazy import FlashInfer (#26977)
2025-10-17 04:48:18 +00:00
utils.py
Update Optional[x] -> x | None and Union[x, y] to x | y (#26633)
2025-10-12 09:51:31 -07:00
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