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494 lines
21 KiB
Plaintext
494 lines
21 KiB
Plaintext
//
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// Based off of:
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// https://github.com/NVIDIA/cutlass/blob/main/examples/55_hopper_mixed_dtype_gemm/55_hopper_int4_fp8_gemm.cu
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//
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#include <ATen/cuda/CUDAContext.h>
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#include <c10/cuda/CUDAGuard.h>
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#include <torch/all.h>
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#include "cutlass_extensions/torch_utils.hpp"
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#include "core/registration.h"
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#include "cutlass/cutlass.h"
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#include <limits>
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#include "cute/tensor.hpp"
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#include "cutlass/gemm/collective/collective_builder.hpp"
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#include "cutlass/epilogue/collective/collective_builder.hpp"
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#include "cutlass/gemm/device/gemm_universal_adapter.h"
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#include "cutlass/gemm/kernel/gemm_universal.hpp"
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#include "cutlass/util/packed_stride.hpp"
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#include "cutlass/util/mixed_dtype_utils.hpp"
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#include "cutlass_extensions/common.hpp"
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#include "cutlass_extensions/epilogue/scaled_mm_epilogues_c3x.hpp"
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#include <cuda_runtime.h>
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namespace vllm::cutlass_w4a8 {
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using namespace cute;
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// -------------------------------------------------------------------------------------
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// Static configuration shared across all instantiations
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// -------------------------------------------------------------------------------------
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using MmaType = cutlass::float_e4m3_t; // A/scale element type
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using QuantType = cutlass::int4b_t; // B element type (packed int4)
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static int constexpr TileShapeK = 128 * 8 / sizeof_bits<MmaType>::value;
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static int constexpr ScalePackSize = 8; // pack 8 scale elements together
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static int constexpr PackFactor = 8; // 8 4-bit packed into int32
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// A matrix configuration
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using ElementA = MmaType; // Element type for A matrix operand
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using LayoutA = cutlass::layout::RowMajor; // Layout type for A matrix operand
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using LayoutA_Transpose =
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typename cutlass::layout::LayoutTranspose<LayoutA>::type;
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constexpr int AlignmentA =
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128 / cutlass::sizeof_bits<
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ElementA>::value; // Memory access granularity/alignment of A
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// matrix in units of elements (up to 16 bytes)
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using StrideA = cutlass::detail::TagToStrideA_t<LayoutA>;
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// B matrix configuration
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using ElementB = QuantType; // Element type for B matrix operand
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using LayoutB =
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cutlass::layout::ColumnMajor; // Layout type for B matrix operand
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using LayoutB_Transpose =
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typename cutlass::layout::LayoutTranspose<LayoutB>::type;
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constexpr int AlignmentB =
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128 / cutlass::sizeof_bits<
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ElementB>::value; // Memory access granularity/alignment of B
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// matrix in units of elements (up to 16 bytes)
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using StrideB = cutlass::detail::TagToStrideB_t<LayoutB>;
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// Define the CuTe layout for reordered quantized tensor B
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// LayoutAtomQuant places values that will be read by the same thread in
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// contiguous locations in global memory. It specifies the reordering within a
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// single warp's fragment
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using LayoutAtomQuant =
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decltype(cutlass::compute_memory_reordering_atom<MmaType>());
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using LayoutB_Reordered = decltype(cute::tile_to_shape(
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LayoutAtomQuant{}, Layout<Shape<int, int, int>, StrideB>{}));
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// Group-wise scales
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using ElementScale = MmaType;
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using LayoutScale = cutlass::layout::RowMajor;
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// Per-tok, per-chan scales
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using ElementSChannel = float;
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// C/D matrix configuration
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using ElementC =
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cutlass::bfloat16_t; // Element type for C and D matrix operands
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using LayoutC =
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cutlass::layout::RowMajor; // Layout type for C and D matrix operands
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constexpr int AlignmentC =
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128 / cutlass::sizeof_bits<
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ElementC>::value; // Memory access granularity/alignment of C
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// matrix in units of elements (up to 16 bytes)
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using ElementD = ElementC;
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using LayoutD = LayoutC;
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constexpr int AlignmentD = 128 / cutlass::sizeof_bits<ElementD>::value;
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// Core kernel configurations
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using ElementAccumulator = float; // Element type for internal accumulation
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using ElementCompute = float; // Element type for epilogue computation
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using ArchTag = cutlass::arch::Sm90; // Tag indicating the minimum SM that
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// supports the intended feature
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using OperatorClass = cutlass::arch::OpClassTensorOp; // Operator class tag
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using KernelSchedule =
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cutlass::gemm::KernelTmaWarpSpecializedCooperative; // Kernel to launch
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// based on the default
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// setting in the
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// Collective Builder
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using EpilogueSchedule = cutlass::epilogue::TmaWarpSpecializedCooperative;
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using EpilogueTileType = cutlass::epilogue::collective::EpilogueTileAuto;
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// ----------------------------------------------------------------------------
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// Kernel template — Tile/Cluster shapes
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// ----------------------------------------------------------------------------
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template <class TileShape_MN, class ClusterShape_MNK>
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struct W4A8GemmKernel {
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using TileShape =
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decltype(cute::append(TileShape_MN{}, cute::Int<TileShapeK>{}));
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using ClusterShape = ClusterShape_MNK;
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// Epilogue per-tok, per-chan scales
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using ChTokScalesEpilogue =
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typename vllm::c3x::ScaledEpilogue<ElementAccumulator, ElementD,
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TileShape>;
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using EVTCompute = typename ChTokScalesEpilogue::EVTCompute;
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using CollectiveEpilogue =
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typename cutlass::epilogue::collective::CollectiveBuilder<
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ArchTag, OperatorClass, TileShape, ClusterShape, EpilogueTileType,
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ElementAccumulator, ElementSChannel,
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// Transpose layout of D here since we use explicit swap + transpose
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// the void type for C tells the builder to allocate 0 smem for the C
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// matrix. We can enable this if beta == 0 by changing ElementC to
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// void below.
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ElementC, typename cutlass::layout::LayoutTranspose<LayoutC>::type,
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AlignmentC, ElementD,
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typename cutlass::layout::LayoutTranspose<LayoutD>::type, AlignmentD,
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EpilogueSchedule, // This is the only epi supporting the required
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// swap + transpose.
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EVTCompute>::CollectiveOp;
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// The Scale information must get paired with the operand that will be scaled.
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// In this example, B is scaled so we make a tuple of B's information and the
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// scale information.
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using CollectiveMainloopShuffled =
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typename cutlass::gemm::collective::CollectiveBuilder<
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ArchTag, OperatorClass,
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cute::tuple<ElementB, cutlass::Array<ElementScale, ScalePackSize>>,
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LayoutB_Reordered, AlignmentB, ElementA, LayoutA_Transpose,
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AlignmentA, ElementAccumulator, TileShape, ClusterShape,
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cutlass::gemm::collective::StageCountAutoCarveout<static_cast<int>(
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sizeof(typename CollectiveEpilogue::SharedStorage))>,
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KernelSchedule>::CollectiveOp;
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using GemmKernelShuffled = cutlass::gemm::kernel::GemmUniversal<
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Shape<int, int, int, int>, // Indicates ProblemShape
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CollectiveMainloopShuffled, CollectiveEpilogue>;
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using GemmShuffled =
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cutlass::gemm::device::GemmUniversalAdapter<GemmKernelShuffled>;
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using StrideC = typename GemmKernelShuffled::StrideC;
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using StrideD = typename GemmKernelShuffled::StrideD;
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using StrideS = typename CollectiveMainloopShuffled::StrideScale;
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static torch::Tensor mm(torch::Tensor const& A,
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torch::Tensor const& B, // already packed
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torch::Tensor const& group_scales, // already packed
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int64_t group_size,
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torch::Tensor const& channel_scales,
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torch::Tensor const& token_scales,
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std::optional<at::ScalarType> const& maybe_out_type) {
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// TODO: param validation
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int m = A.size(0);
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int k = A.size(1);
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int n = B.size(1);
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// safely cast group_size to int
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TORCH_CHECK(group_size > 0 && group_size <= std::numeric_limits<int>::max(),
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"group_size out of supported range for int: ", group_size);
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int const group_size_int = static_cast<int>(group_size);
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// Allocate output
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const at::cuda::OptionalCUDAGuard device_guard(device_of(A));
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auto device = A.device();
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auto stream = at::cuda::getCurrentCUDAStream(device.index());
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torch::Tensor D =
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torch::empty({m, n}, torch::TensorOptions()
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.dtype(equivalent_scalar_type_v<ElementD>)
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.device(device));
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// prepare arg pointers
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auto A_ptr = static_cast<MmaType const*>(A.const_data_ptr());
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auto B_ptr = static_cast<QuantType const*>(B.const_data_ptr());
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auto D_ptr = static_cast<ElementD*>(D.data_ptr());
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// can we avoid hardcode the 8 here
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auto S_ptr =
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static_cast<cutlass::Array<ElementScale, ScalePackSize> const*>(
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group_scales.const_data_ptr());
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// runtime layout for B
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auto shape_B = cute::make_shape(n, k, 1);
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LayoutB_Reordered layout_B_reordered =
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cute::tile_to_shape(LayoutAtomQuant{}, shape_B);
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// strides
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int const scale_k = cutlass::ceil_div(k, group_size_int);
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StrideA stride_A =
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cutlass::make_cute_packed_stride(StrideA{}, cute::make_shape(m, k, 1));
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// Reverse stride here due to swap and transpose
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StrideD stride_D =
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cutlass::make_cute_packed_stride(StrideD{}, cute::make_shape(n, m, 1));
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StrideS stride_S = cutlass::make_cute_packed_stride(
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StrideS{}, cute::make_shape(n, scale_k, 1));
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// Create a structure of gemm kernel arguments suitable for invoking an
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// instance of Gemm auto arguments =
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// args_from_options<GemmShuffled>(options);
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/// Populates a Gemm::Arguments structure from the given arguments
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/// Swap the A and B tensors, as well as problem shapes here.
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using Args = typename GemmShuffled::Arguments;
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using MainloopArguments = typename GemmKernelShuffled::MainloopArguments;
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using EpilogueArguments = typename GemmKernelShuffled::EpilogueArguments;
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MainloopArguments mainloop_arguments{
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B_ptr, layout_B_reordered, A_ptr, stride_A,
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S_ptr, stride_S, group_size_int};
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EpilogueArguments epilogue_arguments{
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ChTokScalesEpilogue::prepare_args(channel_scales, token_scales),
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nullptr,
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{}, // no C
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D_ptr,
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stride_D};
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Args arguments{cutlass::gemm::GemmUniversalMode::kGemm,
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{n, m, k, 1}, // shape
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mainloop_arguments,
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epilogue_arguments};
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// Workspace
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size_t workspace_size = GemmShuffled::get_workspace_size(arguments);
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torch::Tensor workspace =
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torch::empty(workspace_size,
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torch::TensorOptions().dtype(torch::kU8).device(device));
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// Run GEMM
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GemmShuffled gemm;
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CUTLASS_CHECK(gemm.can_implement(arguments));
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CUTLASS_CHECK(gemm.initialize(arguments, workspace.data_ptr(), stream));
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CUTLASS_CHECK(gemm.run(stream));
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return D;
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}
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};
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// ----------------------------------------------------------------------------
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// Kernel instantiations and dispatch logic
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// ----------------------------------------------------------------------------
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using Kernel_256x128_1x1x1 =
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W4A8GemmKernel<Shape<_256, _128>, Shape<_1, _1, _1>>;
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using Kernel_256x64_1x1x1 = W4A8GemmKernel<Shape<_256, _64>, Shape<_1, _1, _1>>;
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using Kernel_256x32_1x1x1 = W4A8GemmKernel<Shape<_256, _32>, Shape<_1, _1, _1>>;
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using Kernel_256x16_1x1x1 = W4A8GemmKernel<Shape<_256, _16>, Shape<_1, _1, _1>>;
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using Kernel_128x256_2x1x1 =
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W4A8GemmKernel<Shape<_128, _256>, Shape<_2, _1, _1>>;
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using Kernel_128x256_1x1x1 =
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W4A8GemmKernel<Shape<_128, _256>, Shape<_1, _1, _1>>;
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using Kernel_128x128_1x1x1 =
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W4A8GemmKernel<Shape<_128, _128>, Shape<_1, _1, _1>>;
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using Kernel_128x64_1x1x1 = W4A8GemmKernel<Shape<_128, _64>, Shape<_1, _1, _1>>;
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using Kernel_128x32_1x1x1 = W4A8GemmKernel<Shape<_128, _32>, Shape<_1, _1, _1>>;
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using Kernel_128x16_1x1x1 = W4A8GemmKernel<Shape<_128, _16>, Shape<_1, _1, _1>>;
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torch::Tensor mm_dispatch(torch::Tensor const& A,
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torch::Tensor const& B, // already packed
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torch::Tensor const& group_scales, // already packed
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int64_t group_size,
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torch::Tensor const& channel_scales,
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torch::Tensor const& token_scales,
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std::optional<at::ScalarType> const& maybe_out_type,
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const std::string& schedule) {
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if (schedule == "256x128_1x1x1") {
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return Kernel_256x128_1x1x1::mm(A, B, group_scales, group_size,
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channel_scales, token_scales,
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maybe_out_type);
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} else if (schedule == "256x64_1x1x1") {
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return Kernel_256x64_1x1x1::mm(A, B, group_scales, group_size,
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channel_scales, token_scales,
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maybe_out_type);
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} else if (schedule == "256x32_1x1x1") {
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return Kernel_256x32_1x1x1::mm(A, B, group_scales, group_size,
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channel_scales, token_scales,
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maybe_out_type);
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} else if (schedule == "256x16_1x1x1") {
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return Kernel_256x16_1x1x1::mm(A, B, group_scales, group_size,
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channel_scales, token_scales,
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maybe_out_type);
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} else if (schedule == "128x256_2x1x1") {
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return Kernel_128x256_2x1x1::mm(A, B, group_scales, group_size,
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channel_scales, token_scales,
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maybe_out_type);
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} else if (schedule == "128x256_1x1x1") {
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return Kernel_128x256_1x1x1::mm(A, B, group_scales, group_size,
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channel_scales, token_scales,
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maybe_out_type);
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} else if (schedule == "128x128_1x1x1") {
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return Kernel_128x128_1x1x1::mm(A, B, group_scales, group_size,
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channel_scales, token_scales,
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maybe_out_type);
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} else if (schedule == "128x64_1x1x1") {
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return Kernel_128x64_1x1x1::mm(A, B, group_scales, group_size,
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channel_scales, token_scales,
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maybe_out_type);
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} else if (schedule == "128x32_1x1x1") {
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return Kernel_128x32_1x1x1::mm(A, B, group_scales, group_size,
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channel_scales, token_scales,
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maybe_out_type);
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} else if (schedule == "128x16_1x1x1") {
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return Kernel_128x16_1x1x1::mm(A, B, group_scales, group_size,
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channel_scales, token_scales,
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maybe_out_type);
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}
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TORCH_CHECK(false, "Unknown W4A8 schedule: ", schedule);
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return {};
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}
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torch::Tensor mm(torch::Tensor const& A,
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torch::Tensor const& B, // already packed
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torch::Tensor const& group_scales, // already packed
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int64_t group_size, torch::Tensor const& channel_scales,
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torch::Tensor const& token_scales,
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std::optional<at::ScalarType> const& maybe_out_type,
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std::optional<std::string> maybe_schedule) {
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// requested a specific schedule
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if (maybe_schedule) {
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return mm_dispatch(A, B, group_scales, group_size, channel_scales,
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token_scales, maybe_out_type, *maybe_schedule);
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}
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std::string schedule;
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int M = A.size(0);
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int K = A.size(1);
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int N = B.size(1);
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// heuristic
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if (M <= 16) {
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schedule = (K == 16384 && N == 18432) ? "256x16_1x1x1" : "128x16_1x1x1";
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} else if (M <= 32) {
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schedule = (K == 16384 && N == 18432) ? "256x32_1x1x1" : "128x32_1x1x1";
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} else if (M <= 64) {
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if (K == 16384 && N == 18432)
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schedule = "256x64_1x1x1";
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else if (N <= 8192 && K <= 8192)
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schedule = "128x32_1x1x1";
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else
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schedule = "128x64_1x1x1";
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} else if (M <= 128) {
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if (K == 16384 && N == 18432)
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schedule = "256x128_1x1x1";
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else if (N <= 8192)
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schedule = "128x64_1x1x1";
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else
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schedule = "128x128_1x1x1";
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} else if (M <= 256) {
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if (N <= 4096)
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schedule = "128x64_1x1x1";
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else if (N <= 8192)
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schedule = "128x128_1x1x1";
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else
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schedule = "128x256_1x1x1";
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} else if (M <= 512 && N <= 4096) {
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schedule = "128x128_1x1x1";
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} else if (M <= 1024) {
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schedule = "128x256_1x1x1";
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} else {
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schedule = "128x256_2x1x1";
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}
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return mm_dispatch(A, B, group_scales, group_size, channel_scales,
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token_scales, maybe_out_type, schedule);
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}
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// ----------------------------------------------------------------------------
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// Pre-processing utils
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// ----------------------------------------------------------------------------
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torch::Tensor pack_scale_fp8(torch::Tensor const& scales) {
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TORCH_CHECK(scales.dtype() == torch::kFloat8_e4m3fn);
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TORCH_CHECK(scales.is_contiguous());
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TORCH_CHECK(scales.is_cuda());
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auto packed_scales = torch::empty(
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{scales.numel() * ScalePackSize},
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torch::TensorOptions().dtype(scales.dtype()).device(scales.device()));
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auto scales_ptr = static_cast<MmaType const*>(scales.const_data_ptr());
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auto packed_scales_ptr =
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static_cast<cutlass::Array<ElementScale, ScalePackSize>*>(
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packed_scales.data_ptr());
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cutlass::pack_scale_fp8(scales_ptr, packed_scales_ptr, scales.numel());
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return packed_scales;
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}
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/*
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GPU-accelerated implementation of cutlass::unified_encode_int4b.
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Constructs a lookup table in constant memory to map 8 bits
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(two 4-bit values) at a time. Assumes memory is contiguous
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and pointers are 16-byte aligned.
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*/
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__constant__ uint8_t kNibbleLUT[256];
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__global__ void unified_encode_int4b_device(const uint8_t* in, uint8_t* out,
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size_t nbytes) {
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constexpr size_t V = sizeof(uint4); // 16 bytes
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const size_t tid = blockIdx.x * blockDim.x + threadIdx.x;
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const size_t nthreads = size_t(gridDim.x) * blockDim.x;
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const size_t nvec = nbytes / V;
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// 1-D grid-stride loop over 16-byte chunks
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for (size_t vec = tid; vec < nvec; vec += nthreads) {
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uint4 v = reinterpret_cast<const uint4*>(in)[vec];
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uint8_t* b = reinterpret_cast<uint8_t*>(&v);
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#pragma unroll
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for (int i = 0; i < int(V); ++i) b[i] = kNibbleLUT[b[i]];
|
|
reinterpret_cast<uint4*>(out)[vec] = v;
|
|
}
|
|
}
|
|
|
|
static bool upload_lut() {
|
|
std::array<uint8_t, 256> lut{};
|
|
auto map_nib = [](uint8_t v) -> uint8_t {
|
|
// 1..7 -> (8 - v); keep 0 and 8..15
|
|
return (v == 0 || (v & 0x8)) ? v : uint8_t(8 - v);
|
|
};
|
|
for (int b = 0; b < 256; ++b) {
|
|
uint8_t lo = b & 0xF;
|
|
uint8_t hi = (b >> 4) & 0xF;
|
|
lut[b] = uint8_t((map_nib(hi) << 4) | map_nib(lo));
|
|
}
|
|
cudaError_t e = cudaMemcpyToSymbol(kNibbleLUT, lut.data(), lut.size(),
|
|
/*offset=*/0, cudaMemcpyHostToDevice);
|
|
|
|
return (e == cudaSuccess);
|
|
}
|
|
|
|
static bool unified_encode_int4b(cutlass::int4b_t const* in,
|
|
cutlass::int4b_t* out, size_t num_int4_elems) {
|
|
// Build/upload LUT
|
|
if (!upload_lut()) return false;
|
|
|
|
static_assert(sizeof(typename cutlass::int4b_t::Storage) == 1,
|
|
"int4 storage must be 1 byte");
|
|
const size_t nbytes = num_int4_elems >> 1;
|
|
|
|
auto* in_bytes = reinterpret_cast<uint8_t const*>(in);
|
|
auto* out_bytes = reinterpret_cast<uint8_t*>(out);
|
|
|
|
// kernel launch params
|
|
constexpr int block = 256;
|
|
const size_t nvec = nbytes / sizeof(uint4); // # of 16B vectors
|
|
int grid = int((nvec + block - 1) / block);
|
|
if (grid == 0) grid = 1; // ensure we still cover the tail in the kernel
|
|
|
|
unified_encode_int4b_device<<<grid, block>>>(in_bytes, out_bytes, nbytes);
|
|
cudaError_t err = cudaGetLastError();
|
|
return (err == cudaSuccess);
|
|
}
|
|
|
|
torch::Tensor encode_and_reorder_int4b(torch::Tensor const& B) {
|
|
TORCH_CHECK(B.dtype() == torch::kInt32);
|
|
TORCH_CHECK(B.dim() == 2);
|
|
|
|
torch::Tensor B_packed = torch::empty_like(B);
|
|
|
|
int k = B.size(0) * PackFactor; // logical k
|
|
int n = B.size(1);
|
|
TORCH_CHECK((n * k) % 32 == 0, "need multiples of 32 int4s for 16B chunks");
|
|
|
|
auto B_ptr = static_cast<QuantType const*>(B.const_data_ptr());
|
|
auto B_packed_ptr = static_cast<QuantType*>(B_packed.data_ptr());
|
|
auto shape_B = cute::make_shape(n, k, 1);
|
|
auto layout_B = make_layout(shape_B, LayoutRight{}); // row major
|
|
LayoutB_Reordered layout_B_reordered =
|
|
cute::tile_to_shape(LayoutAtomQuant{}, shape_B);
|
|
|
|
bool ok =
|
|
vllm::cutlass_w4a8::unified_encode_int4b(B_ptr, B_packed_ptr, n * k);
|
|
TORCH_CHECK(ok, "unified_encode_int4b failed");
|
|
cutlass::reorder_tensor(B_packed_ptr, layout_B, layout_B_reordered);
|
|
|
|
return B_packed;
|
|
}
|
|
|
|
TORCH_LIBRARY_IMPL_EXPAND(TORCH_EXTENSION_NAME, CUDA, m) {
|
|
m.impl("cutlass_w4a8_mm", &mm);
|
|
m.impl("cutlass_pack_scale_fp8", &pack_scale_fp8);
|
|
m.impl("cutlass_encode_and_reorder_int4b", &encode_and_reorder_int4b);
|
|
}
|
|
|
|
} // namespace vllm::cutlass_w4a8 |