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xinyun
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vllm
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vllm
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.buildkite
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Li, Jiang
8655f47f37
[CPU][CI] Re-enable the CPU CI tests (
#19046
)
...
Signed-off-by: jiang.li <jiang1.li@intel.com>
2025-06-02 20:46:47 -07:00
..
lm-eval-harness
Convert
.buildkite
to
ruff format
(
#17656
)
2025-05-13 09:28:31 +00:00
nightly-benchmarks
Fixes a dead link in nightly benchmark readme (
#18856
)
2025-05-29 04:41:39 +00:00
scripts
[CPU][CI] Re-enable the CPU CI tests (
#19046
)
2025-06-02 20:46:47 -07:00
check-wheel-size.py
Convert
.buildkite
to
ruff format
(
#17656
)
2025-05-13 09:28:31 +00:00
generate_index.py
Convert
.buildkite
to
ruff format
(
#17656
)
2025-05-13 09:28:31 +00:00
pyproject.toml
[Doc] Move examples and further reorganize user guide (
#18666
)
2025-05-26 07:38:04 -07:00
release-pipeline.yaml
[release] Change dockerhub username for TPU release (
#18389
)
2025-05-19 23:49:23 -07:00
test-pipeline.yaml
Adding "LoRA Test %N" to AMD production tests (
#18929
)
2025-06-02 20:46:44 -07:00
