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xinyun
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vllm
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vllm
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vllm
/
engine
/
output_processor
History
Alexander Matveev
6d646d08a2
[Core] Optimize Async + Multi-step (
#8050
)
2024-09-03 18:50:29 +00:00
..
__init__.py
[Speculative decoding 6/9] Integrate speculative decoding with LLMEngine (
#3894
)
2024-04-16 13:09:21 -07:00
interfaces.py
[Core] Asynchronous Output Processor (
#7049
)
2024-08-26 20:53:20 -07:00
multi_step.py
[Core] Optimize Async + Multi-step (
#8050
)
2024-09-03 18:50:29 +00:00
single_step.py
[Bugfix] Fix single output condition in output processor (
#7881
)
2024-09-02 20:35:42 -07:00
stop_checker.py
[mypy] Enable following imports for entrypoints (
#7248
)
2024-08-20 23:28:21 -07:00
util.py
[Core] Logprobs support in Multi-step (
#7652
)
2024-08-29 19:19:08 -07:00