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vllm
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Li, Jiang
e3ab93c896
[CPU] Refactor CPU fused MOE (
#30531
)
...
Signed-off-by: jiang1.li <jiang1.li@intel.com>
2025-12-18 14:36:49 +08:00
..
hardware_ci
[CPU] Refactor CPU fused MOE (
#30531
)
2025-12-18 14:36:49 +08:00
scheduled_integration_test
[ROCm][CI] Add "Qwen3-Next-80B-A3B-Instruct MTP Async EPLB Accuracy Test" Back Into AMD CI (
#30590
)
2025-12-14 06:56:26 +00:00
tpu
…
annotate-release.sh
[chore] Update annotate release scripts (
#29077
)
2025-11-20 10:22:40 -08:00
ci-clean-log.sh
…
cleanup-nightly-builds.sh
…
generate-nightly-index.py
[CI] refine more logic when generating and using nightly wheels & indices, add cuda130 build for aarch64, specify correct manylinux version (
#30341
)
2025-12-12 00:42:30 +08:00
rerun-test.sh
[doc] improve ci doc (
#19307
)
2025-06-09 07:26:12 +00:00
run-benchmarks.sh
…
run-multi-node-test.sh
…
run-prime-rl-test.sh
[ROCm][CI] Skip NVIDIA-Only Prime-RL Test in AMD CI (
#29420
)
2025-12-09 02:14:02 +00:00
upload-wheels.sh
[CI] refine more logic when generating and using nightly wheels & indices, add cuda130 build for aarch64, specify correct manylinux version (
#30341
)
2025-12-12 00:42:30 +08:00
