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vllm
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vllm
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vllm
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v1
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Didier Durand
66d3d5422c
[Doc]: fixing typos in diverse files (
#29492
)
...
Signed-off-by: Didier Durand <durand.didier@gmail.com>
2025-11-27 07:15:50 -08:00
..
logits_processor
[Core] Async Scheduling X Spec Decoding Compatibility (
#24799
)
2025-11-17 12:16:20 -08:00
ops
[AITER] [ROCm] Fix crash when loading llama4 model with old aiter version installed, fallback to forward_native implementation (
#29124
)
2025-11-20 17:54:35 -08:00
tpu
[Doc]: fixing typos in diverse files (
#29492
)
2025-11-27 07:15:50 -08:00
__init__.py
…
metadata.py
…
rejection_sampler.py
[Core] Support logprobs with spec decode + async scheduling (
#29223
)
2025-11-25 12:55:24 -08:00
sampler.py
[BugFix] Fix returned logprobs with spec decode + prefill chunking (
#29216
)
2025-11-22 22:41:25 +08:00
